Description
Design For Test (DFT) Methodology team overseas the development & deployment of DFT flows that allows cost-effective testing of our chips. The team explores new test technologies, works with our EDA vendor partners (& internal teams) to develop them and drives their deployment across Freescale.About Freescale SemiconductorFreescale Semiconductor, Inc. is a global leader in the design and manufacture of embedded semiconductors for the automotive, consumer, industrial, networking and wireless markets. The privately held company is based in Austin, Texas, and has design, research and development, manufacturing or sales operations in more than 30 countries. Freescale is one of the world's largest semiconductor companies with 2006 sales of $6.2 billion (USD). www.freescale.comThe DFT student intern will work with an experienced methodologist on one (or more) of the following areas: Memory BIST, Logic BIST, IO-DFT, Analog-DFT, Scan Compression, SOC Scan Integration, AC-Scan.
Requirements:
Basic knowledge of VLSI Design flow including familiarity with Verilog. DFT and ATPG knowledge required with preference to commercial EDA tool flow (Mentor or Cadence). Good scripting skills. Qualified candidates will be students currently pursuing their degree and graduating on or after August 2008.


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